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drv8833 slvsar1e ? january 2011 ? revised july 2015 drv8833 dual h-bridge motor driver 1 features 3 description the drv8833 device provides a dual bridge motor 1 ? dual-h-bridge current-control motor driver driver solution for toys, printers, and other ? can drive two dc motors or one stepper mechatronic applications. motor the device has two h-bridge drivers, and can drive ? low mosfet on-resistance: hs + ls 360 two dc brush motors, a bipolar stepper motor, m solenoids, or other inductive loads. ? output current (at v m = 5 v, 25 c) the output driver block of each h-bridge consists of ? 1.5-a rms, 2-a peak per h-bridge in pwp n-channel power mosfets configured as an h- and rty package options bridge to drive the motor windings. each h-bridge ? 500-ma rms, 2-a peak per h-bridge in pw includes circuitry to regulate or limit the winding current. package option ? outputs can be in parallel for internal shutdown functions with a fault output pin are provided for overcurrent protection, short-circuit ? 3-a rms, 4-a peak (pwp and rty) protection, undervoltage lockout, and ? 1-a rms, 4-a peak (pw) overtemperature. a low-power sleep mode is also ? wide power supply voltage range: provided. 2.7 to 10.8 v the drv8833 is packaged in a 16-pin wqfn ? pwm winding current regulation and current package with powerpad ? (eco-friendly: rohs & no limiting sb/br). ? thermally enhanced surface-mount packages device information (1) 2 applications part number package body size (nom) tssop (16) 5.00 mm 4.40 mm ? battery-powered toys drv8833 htssop (16) 5.00 mm 4.40 mm ? pos printers wqfn (16) 4.00 mm 4.00 mm ? video security cameras (1) for all available packages, see the orderable addendum at ? office automation machines the end of the data sheet. ? gaming machines ? robotics simplified schematic 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. pwm nsleep nfault 2.7 to 10.8 v controller m + t + t drv8833 stepper or brushed dc motor driver 1.5 a 1.5 a productfolder sample &buy technical documents tools & software support &community referencedesign
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com table of contents 8.1 application information ............................................ 12 1 features .................................................................. 1 8.2 typical application .................................................. 12 2 applications ........................................................... 1 9 power supply recommendations ...................... 14 3 description ............................................................. 1 9.1 bulk capacitance .................................................... 14 4 revision history ..................................................... 2 9.2 power supply and logic sequencing ..................... 14 5 pin configuration and functions ......................... 3 10 layout ................................................................... 15 6 specifications ......................................................... 5 10.1 layout guidelines ................................................. 15 6.1 absolute maximum ratings ...................................... 5 10.2 layout example .................................................... 15 6.2 esd ratings ............................................................ 5 10.3 thermal considerations ........................................ 16 6.3 recommended operating conditions ....................... 5 10.4 power dissipation ................................................. 16 6.4 thermal information .................................................. 5 11 device and documentation support ................. 17 6.5 electrical characteristics ........................................... 6 11.1 documentation support ........................................ 17 6.6 typical characteristics .............................................. 7 11.2 community resources .......................................... 17 7 detailed description .............................................. 8 11.3 trademarks ........................................................... 17 7.1 overview ................................................................... 8 11.4 electrostatic discharge caution ............................ 17 7.2 functional block diagram ......................................... 8 11.5 glossary ................................................................ 17 7.3 feature description ................................................... 9 12 mechanical, packaging, and orderable 7.4 device functional modes ........................................ 11 information ........................................................... 17 8 application and implementation ........................ 12 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision d (march 2015) to revision e page ? updated features bullets to include specifications for other packages ................................................................................. 1 ? added note back to pin functions regarding the different i/o types ..................................................................................... 3 ? corrected the device name and current regulation description in overview ......................................................................... 8 ? corrected output current to 1.5-a rms from 700-ma rms .................................................................................................. 8 changes from revision c (january 2013) to revision d page ? added esd ratings table , feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section ................................................................................................. 1 2 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 5 pin configuration and functions pwp package rty package 16-pin htssop 16-pin wqfn top view top view pw package 16-pin tssop top view pin functions pin external components i/o (1) description htssop, or connections name wqfn tssop power and ground 11 device ground. htssop package both the gnd pin and device powerpad gnd 13 ? ppad has powerpad. must be connected to ground. bypass to gnd with 2.2- f, 6.3-v vint 12 14 ? internal supply bypass capacitor. connect to motor supply. a 10- f vm 10 12 ? device power supply (minimum) ceramic bypass capacitor to gnd is recommended. connect a 0.01- f, 16-v (minimum) x7r vcp 9 11 io high-side gate drive voltage ceramic capacitor to vm. control logic input controls state of aout1. ain1 14 16 i bridge a input 1 internal pulldown. logic input controls state of aout2. ain2 13 15 i bridge a input 2 internal pulldown. logic input controls state of bout1. bin1 7 9 i bridge b input 1 internal pulldown. logic input controls state of bout2. bin2 8 10 i bridge b input 2 internal pulldown. logic high to enable device, logic low to nsleep 15 1 i sleep mode input enter low-power sleep mode and reset all internal logic. internal pulldown. (1) i = input, o = output, oz = tri-state output, od = open-drain output, io = input/output copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: drv8833 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ain1 ain2 vint gnd vm vcp bin2 bin1 bout1 nfault bout2 bisen aisen aout2 aout1 nsleep 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd (ppad) aout1nsleep ain1 ain2 vintgnd vm vcp bin1bin2 bout1 nfault bout2 bisen aout2 aisen 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 gnd (ppad) ain1 ain2 vint gnd vm vcp bin2 bin1 bout1 nfault bout2 bisen aisen aout2 aout1 nsleep
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com pin functions (continued) pin external components i/o (1) description htssop, or connections name wqfn tssop status logic low when in fault condition nfault 6 8 od fault output (overtemperature, overcurrent) output connect to current sense resistor for bridge aisen 1 3 io bridge a ground / i sense a, or gnd if current control not needed connect to current sense resistor for bridge bisen 4 6 io bridge b ground / i sense b, or gnd if current control not needed aout1 16 2 o bridge a output 1 connect to motor winding a aout2 2 4 o bridge a output 2 bout1 5 7 o bridge b output 1 connect to motor winding b bout2 3 5 o bridge b output 2 4 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit vm power supply voltage ? 0.3 11.8 v digital input pin voltage ? 0.5 7 v xisen pin voltage ? 0.3 0.5 v peak motor drive output current internally limited a t j operating junction temperature ? 40 150 c t stg storage temperature ? 60 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 esd ratings value unit human body model (hbm), per ansi/esda/jedec js-001, all pins (1) 4000 electrostatic v (esd) v charged device model (cdm), per jedec specification jesd22-c101, all discharge 1500 pins (2) (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.3 recommended operating conditions t a = 25 c (unless otherwise noted) min nom max unit v m motor power supply voltage range (1) 2.7 10.8 v v digin digital input pin voltage range ? 0.3 5.75 v i out rty package continuous rms or dc output current per bridge (2) 1.5 a (1) r ds(on) increases and maximum output current is reduced at vm supply voltages below 5 v. (2) v m = 5 v, power dissipation and thermal limits must be observed. 6.4 thermal information drv8833 pwp rty pw thermal metric (1) unit (htssop) (wqfn) (tssop) 16 pins 16 pins 16 pins r ja junction-to-ambient thermal resistance 40.5 37.2 103.1 c/w r jc(top) junction-to-case (top) thermal resistance 32.9 34.3 38 c/w r jb junction-to-board thermal resistance 28.8 15.3 48.1 c/w jt junction-to-top characterization parameter 0.6 0.3 3 c/w jb junction-to-board characterization parameter 11.5 15.4 47.5 c/w r jc(bot) junction-to-case (bottom) thermal resistance 4.8 3.5 n/a c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report, spra953 . copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: drv8833
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com 6.5 electrical characteristics t a = 25 c (unless otherwise noted) parameter test conditions min typ max unit power supply i vm vm operating supply current v m = 5 v, xin1 = 0 v, xin2 = 0 v 1.7 3 ma i vmq vm sleep mode supply current v m = 5 v 1.6 2.5 a v uvlo vm undervoltage lockout voltage v m falling 2.6 v vm undervoltage lockout v hys 90 mv hysteresis logic-level inputs nsleep 0.5 v il input low voltage v all other pins 0.7 nsleep 2.5 v ih input high voltage v all other pins 2 v hys input hysteresis 0.4 v nsleep 500 r pd input pulldown resistance k all except nsleep 150 i il input low current vin = 0 1 a vin = 3.3 v, nsleep 6.6 13 i ih input high current a vin = 3.3 v, all except nsleep 16.5 33 t deg input deglitch time 450 ns nfault output (open-drain output) v ol output low voltage i o = 5 ma 0.5 v i oh output high leakage current v o = 3.3 v 1 a h-bridge fets v m = 5 v, i o = 500 ma, t j = 25 c 200 v m = 5 v, i o = 500 ma, t j = 85 c 325 hs fet on resistance v m = 2.7 v, i o = 500 ma, t j = 25 c 250 v m = 2.7 v, i o = 500 ma, t j = 85 c 350 r ds(on) m ? v m = 5 v, i o = 500 ma, t j = 25 c 160 v m = 5 v, i o = 500 ma, t j = 85 c 275 ls fet on resistance v m = 2.7 v, i o = 500 ma, t j = 25 c 200 v m = 2.7 v, i o = 500 ma, t j = 85 c 300 i off off-state leakage current v m = 5 v, t j = 25 c, v out = 0 v ? 1 1 a motor driver ? pwm current control pwm frequency internal pwm frequency 50 khz t r rise time v m = 5 v, 16 to gnd, 10% to 90% v m 180 ns t f fall time v m = 5 v, 16 to gnd, 10% to 90% v m 160 ns t prop propagation delay inx to outx v m = 5 v 1.1 s t dead dead time (1) v m = 5 v 450 ns protection circuits i ocp overcurrent protection trip level 2 3.3 a t deg ocp deglitch time 4 s t ocp overcurrent protection period 1.35 ms t tsd thermal shutdown temperature die temperature 150 160 180 c (1) internal dead time. external implementation is not necessary. 6 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 electrical characteristics (continued) t a = 25 c (unless otherwise noted) parameter test conditions min typ max unit current control v trip xisen trip voltage 160 200 240 mv t blank current sense blanking time 3.75 s sleep mode t wake start-up time nsleep inactive high to h-bridge on 1 ms 6.6 typical characteristics figure 2. sleep current figure 1. operating current figure 3. r ds(on) (hs + ls) figure 4. r ds(on) (hs + ls) copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: drv8833 0 100 200 300 400 500 600 700 800 2.7 3.6 4.5 5.4 6.3 7.2 8.1 9.0 9.9 10.8 r ds(on) (hs + ls) (m ? ) v vm (v) -40c 25c 85c c004 0 100 200 300 400 500 600 700 800 40 30 20 10 0 10 20 30 40 50 60 70 80 r ds(on) (hs + ls) (m ? ) temperature ( ? c) 2.7 v 5 v 10.8 v c003 0.0 0.5 1.0 1.5 2.0 2.5 3.0 2.7 3.6 4.5 5.4 6.3 7.2 8.1 9.0 9.9 10.8 i vm (ma) v vm (v) 40 ? c 25c 85c c001 5.0 0.0 5.0 10.0 15.0 20.0 25.0 2.7 3.6 4.5 5.4 6.3 7.2 8.1 9.0 9.9 10.8 i vmq (ua) v vm (v) 40 ? c 25c 85c c002
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com 7 detailed description 7.1 overview the drv8833 device is an integrated motor driver solution for brushed dc or bipolar stepper motors. the device integrates two nmos h-bridges and current regulation circuitry. the drv8833 can be powered with a supply voltage from 2.7 to 10.8 v and can provide an output current up to 1.5-a rms. a simple pwm interface allows easy interfacing to the controller circuit. the current regulation is a fixed frequency pwm slow decay. the device includes a low-power sleep mode, which lets the system save power when not driving the motor. 7.2 functional block diagram 8 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833 over- temp aout1 gnd ain1 vm logic aout2 vm gate drive & ocp bout1 vm bout2 vm gate drive & ocp bisen aisen step motor drives 2x dc motor or 1x stepper isen isen ain2 bin1 bin2 charge pump 0.01uf vm vm vcp vm internal ref & regs vint dcm dcm nfault nsleep 2.2uf 10uf
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 7.3 feature description 7.3.1 fixed-frequency pwm motor drivers drv8833 contains two identical h-bridge motor drivers with current-control pwm circuitry. figure 5 shows a block diagram of the circuitry. figure 5. motor control circuitry 7.3.2 bridge control and decay modes the ain1 and ain2 input pins control the state of the aout1 and aout2 outputs; similarly, the bin1 and bin2 input pins control the state of the bout1 and bout2 outputs. table 1 shows the logic. table 1. h-bridge logic xin1 xin2 xout1 xout2 function coast/fast 0 0 z z decay 0 1 l h reverse 1 0 h l forward brake/slow 1 1 l l decay the inputs can also be used for pwm control of the motor speed. when controlling a winding with pwm, when the drive current is interrupted, the inductive nature of the motor requires that the current must continue to flow. this is called recirculation current. to handle this recirculation current, the h-bridge can operate in two different states: fast decay or slow decay. in fast decay mode, the h-bridge is disabled and recirculation current flows through the body diodes; in slow decay, the motor winding is shorted. to pwm using fast decay, the pwm signal is applied to one xin pin while the other is held low; to use slow decay, one xin pin is held high. table 2. pwm control of motor speed xin1 xin2 function pwm 0 forward pwm, fast decay 1 pwm forward pwm, slow decay 0 pwm reverse pwm, fast decay pwm 1 reverse pwm, slow decay copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: drv8833 xout1 xout 2 vm xisen xin2 pre- drive vcp, vint vm + - pwm ocp ocp xin1 ref (200mv) dcm optional
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com figure 6 shows the current paths in different drive and decay modes. figure 6. drive and decay modes 7.3.3 current control the current through the motor windings may be limited, or controlled, by a fixed-frequency pwm current regulation, or current chopping. for dc motors, current control is used to limit the start-up and stall current of the motor. for stepper motors, current control is often used at all times. when an h-bridge is enabled, current rises through the winding at a rate dependent on the dc voltage and inductance of the winding. if the current reaches the current chopping threshold, the bridge disables the current until the beginning of the next pwm cycle. immediately after the current is enabled, the voltage on the xisen pin is ignored for a fixed period of time before enabling the current sense circuitry. this blanking time is fixed at 3.75 s. this blanking time also sets the minimum on time of the pwm when operating in current chopping mode. the pwm chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the xisen pins with a reference voltage. the reference voltage is fixed at 200 mv. the chopping current is calculated in equation 1 . (1) example: if a 1- sense resistor is used, the chopping current will be 200 mv/1 = 200 ma. once the chopping current threshold is reached, the h-bridge switches to slow decay mode. winding current is recirculated by enabling both of the low-side fets in the bridge. this state is held until the beginning of the next fixed-frequency pwm cycle. if current control is not needed, the xisen pins should be connected directly to ground. 10 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833 chop isense 200 mv i r xout1 xout2 1 2 3 forward driveslow decay fast decay vm 1 2 1 2 3 reverse drive slow decay fast decay xout1 xout2 3 vm 1 2 3 forward reverse
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 7.3.4 nsleep operation driving nsleep low will put the device into a low power sleep state. in this state, the h-bridges are disabled, the gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. all inputs are ignored until nsleep returns inactive high. when returning from sleep mode, some time (up to 1 ms) needs to pass before the motor driver becomes fully operational. to make the board design simple, the nsleep can be pulled up to the supply (vm). ti recommends using a pullup resistor when this is done. this resistor limits the current to the input in case vm is higher than 6.5 v. internally, the nsleep pin has a 500-k resistor to gnd. it also has a clamping zener diode that clamps the voltage at the pin at 6.5 v. currents greater than 250 a can cause damage to the input structure. hence the recommended pullup resistor would be between 20 k and 75 k . 7.3.5 protection circuits the drv8833 is fully protected against undervoltage, overcurrent and overtemperature events. 7.3.5.1 overcurrent protection (ocp) an analog current limit circuit on each fet limits the current through the fet by limiting the gate drive. if this analog current limit persists for longer than the ocp deglitch time, all fets in the h-bridge will be disabled and the nfault pin will be driven low. the driver will be re-enabled after the ocp retry period (t ocp ) has passed. nfault becomes high again at this time. if the fault condition is still present, the cycle repeats. if the fault is no longer present, normal operation resumes and nfault remains deasserted. please note that only the h-bridge in which the ocp is detected will be disabled while the other bridge will function normally. overcurrent conditions are detected independently on both high- and low-side devices; that is, a short to ground, supply, or across the motor winding will all result in an overcurrent shutdown. overcurrent protection does not use the current sense circuitry used for pwm current control, so it functions even without presence of the xisen resistors. 7.3.5.2 thermal shutdown (tsd) if the die temperature exceeds safe limits, all fets in the h-bridge will be disabled and the nfault pin will be driven low. once the die temperature has fallen to a safe level, operation will automatically resume. 7.3.5.3 undervoltage lockout (uvlo) if at any time the voltage on the vm pin falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled, and all internal logic will be reset. operation will resume when vm rises above the uvlo threshold. nfault is driven low in the event of an undervoltage condition. table 3. device protection internal fault condition error report h-bridge recovery circuits vm undervoltage v m < 2.5 v none disabled disabled v m > 2.7 v (uvlo) overcurrent (ocp) i out > i ocp faultn disabled operating ocp thermal shutdown t j > t tsd faultn disabled operating t j < t tsd ? t hys (tsd) 7.4 device functional modes the drv8833 is active unless the nsleep pin is brought logic low. in sleep mode, the h-bridge fets are disabled (hi-z). the drv8833 is brought out of sleep mode automatically if nsleep is brought logic high. twake must elapse before the outputs change state after wakeup. table 4. modes of operation fault condition h-bridge internal circuits operating nsleep pin high operating operating sleep mode nsleep pin low disabled disabled fault encountered any fault condition met disabled see table 3 copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: drv8833
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information the drv8833 is used in brushed dc or stepper motor control. the following design procedure can be used to configure the drv8833 in a brushed dc motor application. the inputs and outputs are connected in parallel to achieve higher current. 8.2 typical application the two h-bridges in the drv8833 can be connected in parallel for double the current of a single h-bridge. the internal dead time in the drv8833 prevents any risk of cross-conduction (shoot-through) between the two bridges due to timing differences between the two bridges. figure 7 shows the connections. figure 7. parallel mode 8.2.1 design requirements table 5. design parameters design parameter reference example value motor voltage v m 10 v motor rms current i rms 0.8 a motor start-up current i start 2 a motor current trip point i trip 2.5 a 8.2.2 detailed design procedure 8.2.2.1 motor voltage the motor voltage to use will depend on the ratings of the motor selected and the desired rpm. a higher voltage spins a brushed dc motor faster with the same pwm duty cycle applied to the power fets. a higher voltage also increases the rate of current change through the inductive motor windings. 12 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833 vm 11 c10.01uf c4 10uf + 12 vm vcp ain1ain2 u1 drv8833 m from controller i 1n in2 low = sleep, high = run 1 10 9 15 bin1bin2 nsleep aout1 aout2 bout1 bout2 nfault vint aisenbisen gndpgnd 24 7 5 8 14 3 6 c22.2uf r2200m 13 pp 16
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 8.2.2.2 motor current trip point when the voltage on pin xisen exceeds v trip (0.2 v), current regulation is activated. the r isense resistor should be sized to set the desired i chop level. r isense = 0.2 v / i chop (2) to set i chop to 1 a, r sense = 0.2 v / 1 a = 0.2 ? . 8.2.2.3 sense resistor for optimal performance, it is important for the sense resistor to be: ? surface-mount ? low inductance ? rated for high enough power ? placed closely to the motor driver the power dissipated by the sense resistor equals i rms 2 r. for example, if peak motor current is 3 a, rms motor current is 2 a, and a 0.05- ? sense resistor is used, the resistor will dissipate 2 a 2 0.05 ? = 0.2 w. the power quickly increases with higher current levels. resistors typically have a rated power within some ambient temperature range, along with a derated power curve for high ambient temperatures. when a pcb is shared with other components generating heat, margin should be added. for best practice, measure the actual sense resistor temperature in a final system, along with the power mosfets, as those are often the hottest components. because power resistors are larger and more expensive than standard resistors, the common practice is to use multiple standard resistors in parallel, between the sense node and ground. this distributes the current and heat dissipation. 8.2.3 application curve figure 8. current regulation copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: drv8833
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com 9 power supply recommendations 9.1 bulk capacitance having an appropriate local bulk capacitance is an important factor in motor drive system design. it is generally beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size. the amount of local capacitance needed depends on a variety of factors, including: ? the highest current required by the motor system ? the capacitance and ability to source current ? the amount of parasitic inductance between the power supply and motor system ? the acceptable voltage ripple ? the type of motor used (brushed dc, brushless dc, stepper) ? the motor braking method the inductance between the power supply and the motor drive system limits the rate current can change from the power supply. if the local bulk capacitance is too small, the system responds to excessive current demands or dumps from the motor with a change in voltage. when adequate bulk capacitance is used, the motor voltage remains stable and high current can be quickly supplied. the data sheet generally provides a recommended value, but system-level testing is required to determine the appropriate sized bulk capacitor. figure 9. example setup of motor drive system with external power supply the voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases when the motor transfers energy to the supply. 9.2 power supply and logic sequencing there is no specific sequence for powering up the drv8833. the presence of digital input signals is acceptable before vm is applied. after vm is applied to the drv8833, the device begins operation based on the status of the control pins. 14 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833 local bulk capacitor parasitic wire inductance + motor driver power supply motor drive system vm gnd + ic bypass capacitor
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 10 layout 10.1 layout guidelines the vm pin should be bypassed to gnd using low-esr ceramic bypass capacitors with a recommended value of 10- f rated for vm. this capacitor should be placed as close to the vm pin as possible with a thick trace or ground plane connection to the device gnd pin. a low-esr ceramic capacitor must be placed in between the vm and vcp pins. ti recommends a value of 0.01- f rated for 16 v. place this component as close to the pins as possible. bypass vint to ground with a 2.2- f ceramic capacitor rated 6.3 v. place this bypass capacitor as close to the pin as possible. 10.1.1 heatsinking the powerpad package uses an exposed pad to remove heat from the device. for proper operation, this pad must be thermally connected to copper on the pcb to dissipate heat. on a multilayer pcb with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. on pcbs without internal planes, copper area can be added on either side of the pcb to dissipate heat. if the copper area is on the opposite side of the pcb from the device, thermal vias are used to transfer the heat between top and bottom layers. for details about how to design the pcb, refer to ti application report, powerpad ? thermally enhanced package ( slma002 ) and ti application brief, powerpad ? made easy ( slma004 ), available at www.ti.com . in general, the more copper area that can be provided, the more power can be dissipated. note the pw package option is not thermally enhanced and ti recommends adhering to the power dissipation limits. 10.2 layout example figure 10. recommended layout example copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 15 product folder links: drv8833 2.2 f nsleep aout1 aisen aout2 bout2 bisen bout1 nfault ain1 ain2 vint gnd vm bin2 bin1 r aisen r bisen 10 f vcp .01 f
drv8833 slvsar1e ? january 2011 ? revised july 2015 www.ti.com 10.3 thermal considerations 10.3.1 maximum output current in actual operation, the maximum output current achievable with a motor driver is a function of die temperature. this, in turn, is greatly affected by ambient temperature and pcb design. basically, the maximum motor current will be the amount of current that results in a power dissipation level that, along with the thermal resistance of the package and pcb, keeps the die at a low enough temperature to stay out of thermal shutdown. the dissipation ratings given in the data sheet can be used as a guide to calculate the approximate maximum power dissipation that can be expected to be possible without entering thermal shutdown for several different pcb constructions. however, for accurate data, the actual pcb design must be analyzed through measurement or thermal simulation. 10.3.2 thermal protection the drv8833 has thermal shutdown (tsd) as described above. if the die temperature exceeds approximately 150 c, the device will be disabled until the temperature drops by 45 c. any tendency of the device to enter tsd is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature. 10.4 power dissipation power dissipation in the drv8833 is dominated by the dc power dissipated in the output fet resistance, or r ds(on) . there is additional power dissipated due to pwm switching losses, which are dependent on pwm frequency, rise and fall times, and vm supply voltages. these switching losses are typically on the order of 10% to 30% of the dc power dissipation. the dc power dissipation of one h-bridge can be roughly estimated by equation 3 . where ? p tot is the total power dissipation ? hs - r ds(on) is the resistance of the high-side fet ? ls - r ds(on) is the resistance of the low-side fet ? i out(rms) is the rms output current being applied to the motor (3) r ds(on) increases with temperature, so as the device heats, the power dissipation increases. this must be taken into consideration when sizing the heatsink. 16 submit documentation feedback copyright ? 2011 ? 2015, texas instruments incorporated product folder links: drv8833 2 2 tot ds(on) out(rms) ds(on) out(rms) 3 +6 5 , /6 5 , u u
drv8833 www.ti.com slvsar1e ? january 2011 ? revised july 2015 11 device and documentation support 11.1 documentation support 11.1.1 related documentation for related documentation see the following: ? powerpad ? thermally enhanced package , slma002 ? powerpad ? made easy , slma004 ? current recirculation and decay modes , slva321 ? calculating motor driver power dissipation , slva504 ? understanding motor driver current ratings , slva505 11.2 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.3 trademarks powerpad, e2e are trademarks of texas instruments. all other trademarks are the property of their respective owners. 11.4 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 11.5 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. copyright ? 2011 ? 2015, texas instruments incorporated submit documentation feedback 17 product folder links: drv8833
package option addendum www.ti.com 26-apr-2015 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples drv8833pw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 8833pw drv8833pwp active htssop pwp 16 90 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 drv8833 DRV8833PWPR active htssop pwp 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 drv8833 drv8833pwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 8833pw drv8833rtyr active qfn rty 16 3000 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 drv8833 drv8833rtyt active qfn rty 16 250 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 85 drv8833 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 26-apr-2015 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant DRV8833PWPR htssop pwp 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 drv8833pwr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 drv8833rtyr qfn rty 16 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 drv8833rtyt qfn rty 16 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 q2 package materials information www.ti.com 27-apr-2015 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) DRV8833PWPR htssop pwp 16 2000 367.0 367.0 35.0 drv8833pwr tssop pw 16 2000 367.0 367.0 35.0 drv8833rtyr qfn rty 16 3000 367.0 367.0 35.0 drv8833rtyt qfn rty 16 250 210.0 185.0 35.0 package materials information www.ti.com 27-apr-2015 pack materials-page 2

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